Plenary Speakers
Jianbin Xu
Professor
The Chinese University of Hong Kong, China
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TBA
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TBA
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TBA
Yu Sun
Professor
University of Toronto, Canada
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Yu Sun is a Professor in the Department of Mechanical and Industrial Engineering, with joint appointments in the Institute of Biomedical Engineering, Department of Electrical and Computer Engineering, and Department of Computer Science at the University of Toronto (UofT). He is a Tier I Canada Research Chair and was the founding Director of the UofT Robotics Institute. His lab specializes in developing innovative technologies and instruments for manipulating and characterizing cells, molecules, and nanomaterials. He is a Fellow of Canadian Academy of Engineering, a Fellow of The Academy of Science of Royal Society of Canada, a Fellow of Canadian Academy of Health Sciences, an International Member of the Chinese Academy of Engineering, and an International Member of the U.S. National Academy of Engineering. He was elected Fellow of IEEE, ASME, AIMBE, AAAS, NAI, CSME, and EIC for his work on micro-nano robotic systems and devices. Among the awards he received were an NSERC E.W.R. Steacie Fellowship, NSERC Synergy Award of Innovation, IEEE McNaughton Gold Medal, IEEE EMBS Technical Achievement Award, and IEEE NTC Pioneer Award in Nanotechnology. He is the Editor-in-Chief of IEEE Trans. Automation Science and Engineering and an editorial board member of the AAAS journal, Science Robotics.
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Robotic Cell Surgery
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The capability of manipulating micro and nanometer-sized objects, such as cells and nanomaterials opens new frontiers in robotic surgery, disease diagnostics, industrial applications and enables new discoveries in many disciplines such as biology, medicine, and materials science. The past two decades have witnessed spurred development of micro-nanorobotic systems and technologies with common hallmarks of precision instrumentation, sensing, actuation, and control. This talk will begin with a brief review of the evolution of the robotic micromanipulation field, followed by an overview of challenges, opportunities, and representative advances recently made in this field. Examples of robotic cell manipulation systems for clinical surgery and drug screen will be given; sub-micrometer position control and sub-nanoNewton force control for realizing 3D intracellular and intra-tissue manipulation and measurement will be introduced; and mechanical nanosurgery of chemoresistant tumors will be discussed.
Sorin Cotofana
Professor
Delft University of Technology, Netherlands
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Sorin Cotofana (IEEE Fellow) received the MSc degree in Computer Science from the “Politechnica” University of Bucharest, Romania, and the PhD degree in Electrical Engineering from Delft University of Technology, The Netherlands. He is currently with the Electrical Engineering, Mathematics and Computer Science Faculty, Delft University of Technology, Delft, the Netherlands. His current research is focused on: (i) the design and implementation of dependable/reliable systems out of unpredictable/unreliable components; (ii) ageing assessment/prediction and lifetime reliability aware resource management; and (iii) unconventional computation paradigms and computation with emerging nano-devices. He (co-)authored more than 300 papers in peer-reviewed international journal and conferences, and received 12 international conferences best paper awards, e.g., 2012 IEEE Conference on Nanotechnology, 2012 ACM/IEEE International Symposium on Nanoscale Architectures, 2005 IEEE Conference on Nanotechnology, 2001 International Conference on Computer Design. He served as Associate Editor for TCAS I (2009-2011), TNANO (2008-2014), and TC (2019-2022); Senior Editor for TNANO (2014-2019); Editor in Chief for TNANO (2000-2025); member of JETCAS Senior Editorial Board (2016-2017), and TMSCS Steering Committee member (2014-2018); Chair of the Giga-Nano CASS TC (2013-2015); IEEE Nano Council CASS representative (2013-2014); CASS Distinguished Lecturer (2019-2022); CASS BoG member (2020-2025) and has been actively involved as Reviewer, Technical Program Committee (TPC) member, and TPC (track) and general (co)-chair, in the organization of numerous international conferences.
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Spin Wave Based Computing: Can Spin Wave Warriors Annihilate Charge Legions?
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In this presentation we provide an overview of recent efforts towards developing computing systems based on Spin Waves (SW) instead of charges and voltages. Note that SW computing constitutes a spintronics subfield, which utilizes magnetic excitations for computation and memory applications. We start with an introduction to magnetic interactions, SW physics, and basic SW computing mechanisms. Subsequently, we review state-of-the-art SW devices, i.e., SW interaction-based Majority gates, SW phase rotation Threshold Logic gates, and SW switch Boolean Logic gates, while discussing the specific challenges ahead when attempting to combine such SW gates to obtain circuits and ultimately computing systems. We consider essential aspects, e.g., gate interconnection, logic levels restoration, gate input-output consistency, and fan-out achievement, and we argue that practically relevant pure SW circuits cannot operate independently and they need to be embedded into conventional Complementary Metal-Oxide-Semiconductor (CMOS) circuit wrappers to obtain complete functional hybrid computing systems. We discuss challenges towards the practical realization of such hybrid SW-CMOS systems and present estimates of their potential performance, which suggest that hybrid SW-CMOS systems exhibit ultralow-power operation and may ultimately outperform conventional CMOS circuits in terms of power-delay-area product. Finally, we take a different perspective on SW physics and demonstrate that by leveraging Gilbert dumping, and otherwise unwanted phenomenon, we can obtain extremely effective convolution, an essential neural networks computation kernel, implementations. We conclude with a brief presentation of the SPIDER project approach (EC contract number 101070417), which is the first ever attempt to experimentally demonstrate the feasibility of hybrid SW-CMOS systems.
Kaustav Banerjee
Professor
UC Santa Barbara, USA
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Kaustav Banerjee is Professor of Electrical and Computer Engineering and Director of the Nanoelectronics Research Lab at the University of California, Santa Barbara. His research established atomically thin two-dimensional (2D) materials as scalable platforms for energy-efficient nanoelectronics, spanning transistors, beyond-copper interconnects, RF passives, memory, and monolithic three-dimensional integration. He pioneered predictive, device-physics-driven frameworks that revealed fundamental scaling limits of silicon–copper technologies and defined physically realistic, manufacturable pathways beyond them.
His contributions include the invention of a graphene-based kinetic inductor that resolved long-standing barriers to ultra-compact, high-frequency integrated systems, and the development of intercalated graphene interconnects independently validated and incorporated into advanced foundry technology roadmaps. To accelerate translation toward semiconductor manufacturing, he co-founded Destination 2D in 2021 to advance CMOS-compatible graphene platforms extending from interconnect scaling to thermal management and advanced packaging integration.
Professor Banerjee is a Fellow of IEEE, APS, AAAS, JSPS, and AIIA, and a Clarivate Highly Cited Researcher. His honors include the Humboldt Foundation Bessel Prize, the IEEE Kiyo Tomiyasu Award, and the JSAP Fellow International distinction from the Japan Society of Applied Physics.
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Atoms to Architectures: 2D Materials for Energy-Efficient Nanoelectronics
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As conventional semiconductor technologies reach fundamental limits in electrostatics, interconnect resistivity, power density, and thermal management, sustaining nanoelectronic scaling in the AI era—and the energy efficiency of the global computing infrastructure it underpins—requires new materials and integration paradigms. Two-dimensional (2D) van der Waals materials—including graphene and transition-metal dichalcogenides—provide atomic-scale thickness control, tunable electronic structure, and distinctive transport physics. Through predictive, device-physics-driven frameworks coupled with experimentally validated platforms, Banerjee’s work established how 2D materials overcome intrinsic scaling barriers of silicon–copper technologies—advancing beyond isolated demonstrations to define physically realistic, industry-aligned scaling trajectories with system-level consequences.
This plenary presents a nanoscale-physics perspective on 2D materials as foundational platforms bridging atoms to architectures, enabling continued scaling and dense monolithic three-dimensional (3D) integration. Core principles governing contacts, electrostatics, and energy transport will be examined, together with manufacturable pathways toward 2D transistors and intercalated graphene interconnects—advances independently validated, reflected in advanced foundry technology roadmaps, and translated toward industrial deployment through Destination 2D, co-founded by Banerjee.
Saptarshi Das
Ackley Professor of Engineering
The Pennsylvania State University, USA
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Dr. Das received his B.Eng. degree (2007) in Electronics and Telecommunication Engineering from Jadavpur University, India, and Ph.D. degree (2013) in Electrical and Computer Engineering from Purdue University. He was a Postdoctoral Research Scholar (2013-2015) and Assistant Research Scientist (2015-2016) at Argonne National Laboratory (ANL). Dr. Das joined the Department of Engineering Science and Mechanics (ESM) at Penn State University in January 2016. Dr. Das was the recipient of the Young Investigator Award from the United States Air Force Office of Scientific Research in 2017 and the National Science Foundation (NSF) CAREER award in 2021. Das Research Group at Penn State leads a new multidisciplinary area of science, namely biomimetic sensing, neuromorphic computing, and hardware security inspired by natural designs found in the animal world that allow evolutionary success in resource-constrained environments.
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Scaling 2D CMOS: From Transistors to 3D Integrated Systems
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Two-dimensional (2D) semiconductors provide a powerful platform for pushing transistor scaling beyond the limits of conventional CMOS while opening new pathways for integration. In this talk, I will highlight recent advances in scaling 2D field-effect transistors, with particular emphasis on achieving high-performance p-type devices to enable true CMOS operation and their implementation in functional logic circuits. I will then highlight the progress in monolithic and heterogeneous 3D integration, including three-tier 2D FETs, 3D CMOS, 3D heterogeneous platforms for near-sensor computing, self-powered 3D systems with integrated silicon photovoltaics, and 3D SRAM architectures. Finally, I will briefly discuss additional functional uses of 2D materials, including on-chip thermometry and their role as robust hard masks for advanced patterning. Together, these advances illustrate the transition of 2D materials from scaled transistors to fully integrated 3D electronic systems.